In a dicing process for cutting a processing object such as a silicon wafer, etc. forming a semiconductor integrated circuit and MEMS (Micro Electro Mechanical Systems), a dicing method using a dicing blade burying diamond grinding grains is formerly adopted.
However, in the dicing method using such a blade, the following problems, etc. are caused. (1) When the processing object is cut by the blade, its cutting margin is required so that the processing object is correspondingly reduced and cost is increased. (2) Since it is necessary to prevent that water, etc. used to prevent burning, etc. due to frictional heat in the cutting are attached to the processing object, a protecting device of capping, etc. is required and a maintenance process number is correspondingly increased.
Therefore, in recent years, consideration and research of a dicing method using a laser are advanced. For example, as shown in FIGS. 16A to 16C, a technique for processing a semiconductor wafer (silicon wafer) (hereinafter called “wafer” W as the processing object by the laser is known.
Here, a summary of the laser dicing method shown in FIGS. 16A to 16C will be briefly explained. As shown in FIG. 16A, in the dicing method using the laser, a laser beam L (laser pulse of femto second) emitted from an unillustrated laser light source is first converged by a condenser lens CV, and is irradiated to a part (e.g., divisional cutting schedule line or dicing line) DL to be divisionally cut in the wafer W as the processing object. Thus, the laser beam L incident from a surface Wa of the divisional cutting part DL is refracted at an interface of the air and the wafer W and forms a convergent point (i.e., focus point) P within the wafer W. Accordingly, a photon concentrated at this convergent point P simultaneously has an interaction with respect to an electron within the wafer W, and is absorbed so that a phenomenon called “multiphoton absorption” is caused. Thus, optical damage is generated at this convergent point P and its vicinity. Therefore, thermal distortion is induced and a crack is caused in its portion. Such a crack due to thermal distortion is not limited to multiphoton absorption, but might be also caused by normal photon absorption (one photon absorption) generating optical damage by absorbing one photon. Thus, since a gathering range of cracks can be formed around the convergent point P, this range is generally called “a reforming area”, or “a reforming layer”. In this specification, the gathering of “reforming layers” is called “a reforming area”.
A reforming layer K extending in a line stripe is formed by irradiating such a laser beam L along the divisional cutting part DL (reforming process). Accordingly, as shown in FIG. 16B, plural reforming layers K can be formed in an overlapping layer shape by changing the distance of the convergent point P of the laser beam L. The gathering of the reforming layers K formed in this way becomes a reforming area KK as a gathering range of cracks. Accordingly, as shown in FIG. 16c, divisional cutting can be performed with this reforming area KK as a boundary by pulling the wafer W on both sides with the reforming area KK as a center. Thus, the wafer W can be divided into two wafer pieces, i.e., semiconductor chips (hereinafter, simply called “chips”) CP.
An expand tape T called “a di-attach film (DAF)” is stuck to a rear face Wb of the wafer W. Accordingly, even when the wafer W is divided into chips CP, each chip CP is stuck and held in the expand tape T. Thus, it is prevented that the divided chip CP is separated and scattered. For example, the laser dicing method shown in FIGS. 16A to 16C is also disclosed as “a laser dicing method” in JP-A-2005-1001.
However, in accordance with such a laser dicing method, as shown in FIGS. 16A and 16B, the reforming layer K is formed within the wafer W, but no reforming layer K is formed in a layer (the ranges of cross hatching between arrows shown in FIGS. 16B and 16C and called “surface layers”) Ws of a surface (rear face) including the surface Wa (or rear face Wb) of the wafer W. Therefore, no stable divisional cutting can be always expected as long as the divisional cutting is performed with the reforming layer K as a starting point as shown in FIGS. 16B and 16C. Therefore, a crack might be caused in the surface layer Ws forming no reforming layer K therein in an unscheduled direction. In particular, when the thickness of the wafer is 500 μm or more, it is difficult to focus the convergent point P from characteristics of the condenser lens CV, etc. in the vicinity (surface layer Ws of the rear face Wb) of the rear face Wb in which the laser beam L incident from the surface Wa of the wafer W is deeply advanced and reaches this vicinity. Therefore, a range for forming no reforming layer K is easily formed in the surface layer Ws of the rear face Wb.
Further, when the wafer thickness is thickened, cases for laminating and forming semiconductor materials of different material qualities are increased as in SOI (Silicon On Insulator). Therefore, in the case of such a multi-layered wafer W, refractive indexes with respect to the laser beam L are different in accordance with the thickness and the material quality every layer from the differences of optical characteristics of semiconductors. Therefore, reflection and scattering of the laser beam are easily generated on the boundary faces, etc. of semiconductor layers of different refractive indexes. Accordingly, it is difficult to conform a focal point to scheduled depth and position by complicated refraction of the laser beam passing these semiconductor layers. In particular, influences of reflection and scattering are easily exerted as it is distant from the surface Wa onto which the laser beam L is incident. Therefore, in the multi-layered wafer W, the range for forming no reforming layer K is easily formed in the surface layer Ws of the rear face Wb.
Thus, there is a possibility that growth of a crack is developed in an unscheduled direction in the range for forming no reforming layer K in comparison with a range for forming the reforming layer K. Therefore, when the range for forming no reforming layer K exists in the divisional cutting part DL, a problem exists in that a quality reduction of the chip CP divided by such an unscheduled crack is caused.
Further, in accordance with such a laser dicing method, as shown in FIGS. 25A to 25C, a reforming layer K formed within a wafer W is approximately set at an equal interval in the thickness direction of a divisional cutting part Dev corresponding to the chip Cp. Therefore, when a sufficient number of reforming layers K are not formed with respect to the thickness of the divisional cutting part Dev, crack density within a reforming area KK becomes low. Accordingly, no proper divisional cutting can be performed, and a quality reduction of a divided wafer piece Cp (semiconductor chip) might be caused.
Further, in “a laser processing method” disclosed in JP-A-2005-1001, when plural cutting starting point areas (reforming layers) are formed, a forming position of a substrate (wafer), etc. with respect to its thickness are prescribed. However, in accordance with this prescribing example, the width of the formed cutting starting point area is half the substrate thickness or less. Therefore, it is difficult to be able to perform proper divisional cutting in comparison with a case in which the reforming layers are approximately formed at the equal interval in the thickness direction of the divisional cutting part Dev. In particular, when the wafer thickness is 500 μm or more, the inventors of this application have experimentally confirmed that it is difficult to obtain stable divisional cutting quality even when such a prescribing example is applied.
In contrast to this, the proper divisional cutting can be performed if the laser beam L is irradiated so as to widely secure the reforming area KK as much as possible by forming the reforming layer K in the thickness direction of the divisional cutting part Dev as much as possible. However, time and electric power required to irradiate the laser beam L are excessively supplied. Therefore, an increase in manufacture cost is caused, and load with respect to laser equipment is increased. Therefore, it tends to become causes of shortening of an exchanging period of consumed parts and breakdown generation.
Further, a manufacturing method of the semiconductor chip for dividing the semiconductor substrate processed on a divisional schedule line and adhered to a sheet into semiconductor chips by extending and enlarging this sheet, and loading stress in a planar direction of the semiconductor substrate is formerly used in manufacture of the semiconductor chip.
As a processing method of the divisional schedule line, consideration and research of a processing method (laser dicing) using a laser beam are advanced in recent years. For example, a processing technique of the semiconductor substrate using a laser is disclosed in JP-A-2002-205180. FIGS. 35A and 35B are explanatory views showing a dicing process using the laser beam. FIG. 35A is an explanatory view of a reforming area forming process using irradiation of the laser beam. FIG. 35B is an explanatory view of a dividing process of the semiconductor substrate.
A semiconductor substrate W constructed by a semiconductor of silicon, etc. and forming a semiconductor element D on a substrate face is prepared as shown in FIG. 35A. The rear face of the substrate face is then adhered to the sheet T manufactured by resin and having an extending property. An adhering layer TB coated with an ultraviolet ray hardening type adhesive, etc. is formed on an entire face of the sheet T for adhering the semiconductor substrate W. The semiconductor substrate W is adhered to the adhering layer TB on its entire rear face.
A laser head H for irradiating the laser beam L has a condenser lens CV for converging the laser beam L, and converges the laser beam L at a predetermined focal distance. In the reforming area forming process, the laser head H is moved (in the direction of this side in FIG. 35A) along the divisional schedule line DL for dividing the semiconductor substrate W in a laser beam irradiating condition set such that a convergent point P of the laser beam L is formed in a position of depth d from the surface of the semiconductor substrate W. The laser beam L is then irradiated from the surface of the semiconductor substrate W. Thus, a reforming area K using multiphoton absorption is formed in a path of depth d in which the convergent point P of the laser beam L is scanned.
The reforming area K is formed in plural positions of a predetermined depth within a range of the thickness of the semiconductor substrate W by adjusting the depth d of the convergent point P along the divisional schedule line DL, and moving the convergent point P in the thickness direction of the semiconductor substrate W.
Here, the multiphoton absorption is that a substance absorbs plural photons of the same kind or different kinds. The phenomenon of optical damage is generated by this multiphoton absorption at the convergent point P of the semiconductor substrate W and its vicinity. Thus, thermal distortion is induced, and a crack is generated in its portion. Thus, a layer formed by gathering this crack, i.e., the reforming area K is formed.
Subsequently, as shown in FIG. 35B, the crack is developed in the substrate thickness direction with the reforming area K as a starting point by loading stress in an in-plane direction of the semiconductor substrate W (directions shown by arrows F1, F2 in this figure). The semiconductor substrate W is then divided along the divisional schedule line DL, and a semiconductor chip Cp is obtained.
However, the following problems are caused in the former method when a thick semiconductor substrate is divided.
Namely, as the depth d of the convergent point P becomes large, intensity of the laser beam converged at the convergent point P is attenuated. Therefore, a spread from the convergent point P of the formed reforming area K becomes small. In other words, the size of an area for forming the reforming area K becomes small. The reforming area K formed near the rear face of the semiconductor substrate W becomes a starting point of the division. Therefore, when no reforming area K of a sufficient size is formed in this position, large force is required to perform the division. Therefore, there is a case in which no crack can be developed from the reforming area K. Accordingly, a problem exists in that it becomes a cause of divisional leaving of the semiconductor substrate W, and yield of the semiconductor chip is reduced.